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Novel Logic Encryption Designs for Integrated Circuit Protection

For licensing information, contact:
Michael Moeller, Invention Manager
847-491-4201
michael.moeller@northwestern.edu
For Information, Contact:
Ashley Block
Post Licensing Manager Northwestern University
Innovation & New Ventures Office 847-467-2225 INVOLicenseCompliance@northwestern.edu

NU 2017-097 

 

Inventor

Hai Zhou* 

 

Short Description

A logic encryption design scheme for defending integrated circuits against SAT-based attacks

 

Background

Logic encryption is an important hardware security technique that introduces keys to modify a given combinational circuit in order to lock the functionality from unauthorized uses. It is important for intellectual property protection, integrated circuit production control, Trojan prevention, and many other applications in hardware security. Over the past ten years, integrated circuits and intellectual property, in particular, have faced an increasing number of threats including counterfeiting, reverse-engineering and theft. This is now a critical issue for the microelectronics industry. Traditional methods have generally been ad hoc approaches based on inserting lock gates with keys on randomly selected signals in the original circuit. However, a Boolean Satisfiability (SAT)-based attack has been developed that breaks all the existing combinational logic locking techniques. Thus, there is a need for new logic encryption designs that are robust against such SAT-based attacks. 

 

Abstract

Northwestern researchers have developed an efficient general design scheme to thwart SAT-based attacks using new and specific designs that burden the SAT engine while obfuscating the whole design. Starting with a basic understanding that there are two entangled goals in logic encryption, locking and obfuscation, this new approach separates the two. By investigating the logic of all possible encryptions for a given function, the researchers developed a theory for logic encryption that captures the whole design space and the relationship between a design and its attack complexity. They have tested their logic encryption designs and the obfuscation with one-way function by the SAT-based attack. The experimental results have preliminarily confirmed their theory and reflect the ability to achieve both high attack complexity and error rate. 

 

Applications 

  • IP protection of logic circuits at a fundamental level 

 

Advantages 

  • Exponentially increases the time it takes for an attack to occur 
  • Guarantees a large error rate for every wrong key 
  • Approximate attacks are unable to decrypt the design 

 

Publications

Zhou H (2017) A Humble Theory and Application for Logic Encryption. IACR Cryptology ePrint Archive, 696. 

 

IP Status

A US patent application has been filed

Patent Information: